Conducting lab tests, including component characterization and testing, and producing detailed reports
Designing and verifying FPGAs using Verilog/VHDL
Optimizing FPGA code to enhance resource efficiency
Utilizing cutting-edge tools for FPGA verification
Troubleshooting FPGA issues on hardware platforms
Creating, documenting, and implementing micro-architecture and design specifics for new product features
Physically implementing FPGA targets for emulation, ensuring timing closure and debugging
Integrating processor-based SOC on target ASIC or FPGA
Hands-on experience with hardware-based integration and testing of ASIC/FPGA designs
Professional track record in hardware-based integration and testing of ASIC/FPGA designs
Demonstrated expertise in working with ASIC/FPGA design and/or verification teams, with a focus on progress tracking and stakeholder reporting
Proficiency in hardware emulators usage
Knowledge of hardware verification languages such as System Verilog and System Verilog Assertions
Ability to develop test plans and self-checking, reusable testbenches from scratch
Experience in creating Functional Coverage Models and Closing Code Coverage
Familiarity with Revision Control Systems like svn, cvs, and git
Strong teamwork, organizational, independent work, and project management skills
Proficiency with Xilinx FPGA tools (Vivado, Vitis, HLS), embedded software development, and FPGA logic design (VHDL/Verilog)
Understanding of Ethernet networking, data interfaces, and Xilinx architecture/platforms
Preferred experience in developing FPGA designs for Flight hardware
FPGA Engineer - Peterborough, Canada - Aversan
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A Hardware Designer specializing in FPGA technology needs a top-notch formal engineering background, exceptional problem-solving capabilities, and the ability to make independent decisions. The role involves crafting and executing electronic hardware systems within a team environment, often requiring expertise in both analog and digital circuit design. This position reports directly to the Hardware Engineering Manager.