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Dharshini Thangapushparaja

Dharshini Thangapushparaja

RF Hardware Electrical Engineer

Engineering / Architecture

Vancouver, Metro Vancouver Regional District

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About Dharshini Thangapushparaja:

Motivated individual with progressive engineering experience in the Hardware sector, aiming to work on relevant projects the to acquire knowledge in progression of technological growth and earn industry experience. My aim is to work and bring welfare to the society. Energetic and a team player able to navigate high stress situations and able to meet the deadlines.

Experience

SemTech, Richmond, BC, Canada                                                                                   Jan, 2023 – May, 2023

Hardware Test Engineer, Co-op Student

  • Mainly focused on USB, SD Card, and other Board modifications, exploring the hands-on Hardware and integration testing.
  • Antenna Tool Calculator script tool was created to calculate the EIRP and TRP margin to maintain the FCC regulations and TMO/AT&T/Verizon carrier requirements.
  • Focused on SD Card Troubleshooting, engaging with NXP semiconductors. EEPROM and NOR software flash and erase were performed for USB PD Controlled testing.
  • Other tests for Stress and throughput verification were performed at different Voltage conditions for SD Card.
  • Troubleshooting and debugging the test system while an error occurs on hardware and software during the functionality, performance, and test coverage
  • Soldering Skills and Design understanding skills were enhanced while performing Board Modifications and Impedance Measurement tasks.

 

Sierra Wireless, Richmond, BC, Canada                                                                       Sept, 2022 – Dec, 2022

RF Test Engineer, Co-op Student

  • Testing the AirLink routers – XR90, XR80, RV55, LX60 and their radio module EM9190 to verify the 3GPP Specifications and performing board modifications for improvising results.
  • Writing test scripts in Python or using NI LabView for automation testing. Develop test system documentation for future reference.
  • Candela Tech Chambers with 802.11ac and 802.11ax capable and LANforge as AP and Client was used to perform Wi-Fi Capacity and Rate vs Range test under Conducted, Radiated environment and live test.
  • iQxel-MW LitePoint was used to verify the Wi-Fi Parameters – Power, EVM and Anritsu and R&S CMW500 - 5G and 4G Call was used to verify the Cellular Parameters - Maximum Transmit Power, Minimum Receive Sensitivity for all the supporting bands with the required Spec. values.
  • Humidity Test with 95% humidity, 30 °C to 60 °C temperature range and Thermal Test under -40 °C to +85 °C temperature range depicting the real-time weather condition was performed to monitor the endurance of the units.
  • Other test such as ESD – Air, Contact and EFT – Capacitive tests were performed at different Voltage conditions.

 

Sarcomere Dynamics, Abbotsford, BC, Canada                                                          May, 2022 – Aug, 2022

PCB Designer, Practicum

  • The project aims to create a 6-axis robotic arm Artus Dex with high resilience, dexterity and 21 Degree of Freedom with a compact actuator driver. 
  • The work assigned was to design an actuator driver PCB, incorporated with the position sensor AS5048a and an ODrive to simplify the assembly using KiCAD and Altium
  • Designing a STM32F1 microcontroller along with its power electronic circuits for a mixed signal input.
  • Troubleshooting and debugging the existing design according the size and time constraint and documenting the future in lab test for measuring the regulatory parameters.

 

Indian Institute of Technology, Chennai, Tamil Nadu, India                                       Feb, 2021 – July, 2021

Project Assistant

  • The project in the 5G Testbed aims to develop an interface platform for smooth and feasible data transmission between the 5G Femto Application Platform interfacing MAC and the PHY layers in a communication network.
  • Data transfer using 4 channels at the same time from host to card and card to host using a packet generator IP were executed for a large data, 8192 packets (131072 bits) using direct memory access in Vivado
  • Additionally, VIO (Virtual Input Output) block was designed using Vivado HLS to manually alter the option of the file transfer and the latencies for every single case was calculated and compared.

 

AIRTEL, Chennai, Tamil Nadu, India                                                                                Nov, 2019 – Dec, 2019

Network Engineer, Intern     

  • The project assigned was in the field of Network Planning, where the planning was focused on LTE and 4G networks.
  • Key insight was to identify the poor FDD (Frequency-Division Duplexing) coverage gaps in Chennai, which was enhanced by planning 197 new sites.
  • Learnt Network function tools of the organization: SureCoverage, Google Earth, Facebook Network Insights.
  • Quality factors- KPI (Key Performance Index) were analysed.

Education

University of British Columbia, Okanagan, Canada                                                                

Master of Engineering - Electrical Engineering(Overall: 84.4%)                                                April, 2023

Specialization: Advanced Digital System Design | PCB Design | Digital Control | Deep and Reinforcement Learning 

Key Learning: Machine Learning | Robotics and Automation | Deep and Reinforcement Learning 

 

SASTRA University, Chennai, India                                                                                                  May, 2021

Bachelor of Technology (Honors) - Electronics and Communication Engineering (Overall: 8.8 on 10 scale)

Specialization: Antenna Design | RF Engineering | Digital Electronics

Key Learning: Computer Networks| Microwave Engineering | Digital Signal Processing | Microcontroller 

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