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    Design Verification Engineer F/H - Markham, ON, Canada - Advanced Micro Devices

    Advanced Micro Devices
    Advanced Micro Devices Markham, ON, Canada

    1 week ago

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    Description
    We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world.

    Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded.

    We push the limits of innovation to solve the world's most important challenges.

    A Design Verification Engineering role in our Security IP (SECIP) team, where a large number of individual embedded micro-processor (MP) subsystems and associated hardware accelerators vital to improve subsystems performance and functionality are designed and verified.

    These subsystem IPs provide high performance functions to System on Chip (SoC) products across all AMD business units such as client computers, servers, discrete graphics, and gaming.

    Your expertise will impact security policy management, cryptography, data compression, high throughput DMA, power management, and many other subsystem applications.

    A talented hardware/firmware co-design/verification engineer with strong records of technical ownership and execution to drive block level IP and/or MP subsystem design and verification assignments to completion.

    A forward-thinking engineer who tends to optimize/improve the workflow, anticipate/analyze/resolve technical issues, enjoy a competitive pace while empowering and mentoring team members.

    Develop and maintain block level IP and MP subsystem verification architecture, testbenches, test methodology and infrastructure
    Develop and debug test plans using SystemVerilog/UVM constrained-random test methodology, C-DPI directed test methodology, formal proof verification methodology, and using object-oriented programming (OOP) techniques to implement/maintain testbenches and tests
    Triage regressions, debug simulations, analyze coverage, work/resolve technical issues with design, verification and other teams to achieve verification closure
    Participate in subsystem specification, influence IP micro-architecture development (design for verification aspect), design and execute reusable test methodology across individual MP subsystems
    Provide technical leadership in verification methodology development and critical problem resolution if as advanced level team members
    Proven understanding of MP subsystem architecture, FPGA based simulation techniques or emulation methodology
    Proficient in System Verilog, object oriented programming, and scripting (using Ruby, Perl, Python and Makefile)
    Excellent understanding of standard bus/interface protocols (i.e. Relevant design domain specific knowledge and technical leadership capability required for advanced level candidates


    Academic credentials:
    Bachelor's Degree or Master's Degree in Electrical Engineering, Computer Engineering, or Computer Science, or possibly a related field

    AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.

    We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

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