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- Design the end-to-end power delivery network (PDN) for digital and analog SoC domains, from the voltage regulator to the on-chip decoupling.
- Model voltage regulator switching ripple, bandwidth, and transient response and aid in the selection of power stages, controllers, and associated passives.
- Simulate PCBs and packages in commercial 2.5D electromagnetics simulators to extract N-port models and subsequently, impedance profiles.
- Perform time domain simulations of supply rails to characterize worst case droops and overshoots.
- Collaborate with cross-functional teams, including hardware designers, PCB layout engineers, system architects, and power and performance engineers, to provide power integrity guidance and support throughout the product development lifecycle.
- Contribute to power integrity design reviews, providing technical expertise and recommendations to ensure optimal power integrity performance and adherence to design specifications.
- Document and communicate analysis results, design guidelines, and recommendations to stakeholders, including design teams, management, and customers.
- Participate in cross-functional teams to define and influence system-level architecture decisions that impact power integrity, ensuring optimal performance and scalability.
- B.S. or M.S. in Electrical Engineering or relevant field.
- 5 years of related experience with a Bachelor's degree, or 3 years of experience with a Master's degree, along with relevant industry experience in power delivery and power integrity analysis for high-performance CPUs and compute SoCs.
Sr. Power Integrity Engineer - Toronto, Canada - The Engineering Institute of Canada
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