Review VHDL FPGA 2x2 MIMO implementation
1 week ago
We are looking for a senior FPGA / DSP engineer to perform a technical review of an existing FPGA-based MIMO physical layer (PHY) implementation written primarily in VHDL.
Responsibilities
- Review overall PHY architecture correctness and completeness
- Assess the MLD-based MIMO approach vs classical equalization
Job description
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