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    FPGA Design - Vancouver, Canada - HCLTech

    HCLTech
    Default job background
    Technology / Internet
    Description

    Role : FPGA Design & Verification Engineer

    Location : Vancouver, BC

    Job Description :

    • Partitioning to fit in multiple FPGAs
    • Build including RTL to Bit-file generation and adding Debug hooks within FPGA such as Signaltap
    • Bit-file and Running Software on the FPGA
    • TCL scripting skills; Debugging issues on the FPGA
    • emulation and FPGA models and solutions from RTL design using synthesis, partitioning, and routing tools.
    • the implemented design in terms of timing closure and resource utilization and scale up the design into full implementation.
    • proficiency in implementing synthesizable models using SystemVerilog.
    • support to the emulation team to effectively execute test plans.
    • bring-up and debug standard interfaces like SATA, Nand flash, PCIe, UART, JTAG, I2C, USB, SPI.
    • and implement software to run on ARM processors embedded in Synopsys HAPS FPGAs / HAPS80-S52 experience


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