Project Lead Ii - Mississauga, Canada - UST

UST

Verified Company

Mississauga, Canada

4 weeks ago

Posted by:

Sophia Lee

beBee Recruiter

Description

**Project Lead II - VLSI

_Who we are:
_
Born digital, UST transforms lives through the power of technology. We walk alongside our clients and partners, embedding innovation and agility into everything they do. We help them create transformative experiences and human-centered solutions for a better world.

UST is a mission-driven group of over 29,000+ practical problem solvers and creative thinkers in over 30+ countries.

Our entrepreneurial teams are empowered to innovate, act nimbly, and create a lasting and sustainable impact for our clients, their customers, and the communities in which we live.

With us, you'll create a boundless impact that transforms your career—and the lives of people across the world.

_You Are:
_

_The Opportunity:
_

Lead layout team in completing complex layout for analog/mixedsignal circuits in deep submicron CMOS technologies.
Working with the circuit designer or layout lead to plan/schedule work and negotiate any layout tradeoffs as needed.
Reviewing and analyzing floorplans and complex circuits with circuit designers.
Running complete set of design verification tools available on AMS blocks.
Interpreting LVS, DRC and ERC reports to find the fastest way to complete layout.
Utilizing advanced CAD tools and mask design knowledge to deliver correct and robust layout that meet stringent matching performance, area and power requirements.

_What you need:
_

_Skills and Experience:
_

10+ years of experience in analog/mixedsignal layout design of deep submicron CMOS circuits and at least 3+ years of recent experience on advance nodes including FinFET technologies,
Experience with and knowledge of analog/mixedsignal IP (e.g., SERDES PHY, transmitter and receiver, PLL, DDR PHY, ADCs, DACs, LDOs, etc.)
Experience leading complex layout macros during the full design cycle from floorplan analysis to completion of physical design verification
Great understanding of CAD flows and tools related to analog/mixedsignal layout design
Experience crafting wellmatched, low noise, and low power analog blocks consisting of transistors, resistors, capacitors, pad IO's, ESD structures, etc.
High level of proficiency in custom, as well as standard cellbased, floorplanning and hierarchical layout assembly
Must understand issues of IR drop, RC delay, electromigration, selfheating and coupling capacitance
Must recognize failure prone circuit and layout structures, have experience with analog and DFM standard methodologies, and enthusiastically work with circuit designer or layout lead for the best approach to problems
High level of proficiency in interpretation of CALIBRE DRC, ERC, LVS, etc., reports
Knowledge of CADENCE or MENTOR GRAPHICS layout tools.
Excellent interpersonal skills and able to work with remote teams

_What we believe __:
_

We're proud to embrace the same values that have shaped UST since the beginning. Since day one, we've been building enduring relationships and a culture of integrity. And today, it's those same values that are inspiring us to encourage innovation from everyone, to champion diversity and inclusion, and to place people at the center of everything we do. _

_Humility:
_

We will listen, learn, be empathetic and help selflessly in our interactions with everyone. _

_Humanity:
_

Through business, we will better the lives of those less fortunate than ourselves. _

_Integrity:
_

We honor our commitments and act with responsibility in all our relationships.**_Equal Employment Opportunity Statement

- *

UST is an Equal Opportunity Employer.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.
UST _reserves the right to periodically redefine your roles and responsibilities based on the requirements of the organization and/or your performance._