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    RTL Design Engineer - Vancouver, Canada - Wipro

    Wipro
    Wipro Vancouver, Canada

    6 days ago

    Default job background
    Full time Manufacturing / Mechanical
    Description

    Job Title: Senior RTL Engineer

    Location: Vancouver, British Columbia, Canada

    Permanent Hire

    Job Description:

    8 to 15 years of Experience.

    Logic design /micro-architecture /RTL coding is a must.

    Expertise in Verilog & System Verilog is a must.

    Experience in Synthesis / Understanding of timing concepts for ASIC is required.

    Experience in design of DDR / USB /SATA/ PCIe controller or such complex protocols is a plus.

    Hands on experience in Multi Clock designs, Asynchronous interface.

    Experience on tools utilized in all phases of ASIC development such as Lint, CDC, Simulation etc. is required.

    Knowledge of low power concepts and experience is a plus.

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